DS1394U-33+T&R【PDF 16/26 页】IC RTC SPI 3WIRE W/CHRGR 10-MSOP

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DS1390–DS1394

Low-Voltage SPI/3-Wire RTCs with

Trickle Charger

Maxim Integrated

3-Wire Serial-Data Bus

The DS1392/DS1393 provide a 3-wire serial-data bus,

and support both single-byte and multiple-byte data

transfers for maximum flexibility. The I/O pin is the seri-

al-data input/output pin. The CE input is used to initiate

and terminate a data transfer. The SCLK pin is used to

synchronize data movement between the master

(microcontroller) and the slave (DS1392/DS1393)

devices. Input data is latched on the SCLK rising edge

and output data is shifted out on the SCLK falling edge.

There is one clock for each bit transferred. Address

and data bits are transferred in groups of eight.

Address and data bytes are shifted LSB first into the

I/O pin. Data is transferred out LSB first on the I/O pin

for a read operation.

The address byte is always the first byte entered after

CE is driven high. The MSB (W/R) of this byte deter-

mines if a read or write takes place. If W/R is 0, one or

more read cycles occur. If W/R is 1, one or more write

cycles occur.

Data transfers can be one byte at a time or in multiple-

byte burst mode. After CE is driven high, an address is

written to the DS1392/DS1393. After the address, one

or more data bytes can be written or read. For a single-

byte transfer, one byte is read or written and then CE is

driven low (Figures 13 and 14). For a multiple-byte

transfer, however, multiple bytes can be read or written

after the address has been written (Figure 15). Each

read or write cycle causes the RTC register address to

automatically increment. Incrementing continues until

the device is disabled. The address wraps to 00h after

incrementing to 0Fh (during a read) and wraps to 80h

after incrementing to 8Fh (during a write). Note, howev-

er, that an updated copy of the time is only loaded into

the user-accessible copy upon the rising edge of CE.

Reading the RTC registers in a continuous loop does

not show the time advancing.

Chip Information

TRANSISTOR COUNT: 11,525

PROCESS: CMOS

SUBSTRATE CONNECTED TO GROUND

Thermal Information

Theta-JA: 180°C/W

Theta-JC: 41.9°C/W

SCLK

I/O

ADDRESS

BYTE

DATA

BYTE 0

DATA

BYTE 1

DATA

BYTE N

Figure 15. 3-Wire Multiple-Byte Burst Transfer

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